Publisher description
Suitable for use in a one- or two-semester course for computer and electrical engineering majors. VHDL for Engineers teaches readers how to design and simulate digital systems using the hardware description language, VHDL. These systems are designed for implementation using programmable logic devices (PLDs) such as complex programmable logic devices (CPLDs) and field programmable gate arrays (FPGAs). The book focuses on writing VHDL design descriptions and VHDL testbenches. The steps in VHDL/PLD design methodology are also a key focus. Short presents the complex VHDL language in a logical manner, introducing concepts in an order that allows the readers to begin producing synthesizable designs as soon as possible
More books by Kenneth L Short
Similar books
Rate the book
Write a review and share your opinion with others. Try to focus on the content of the book. Read our instructions for further information.
VHDL for Engineers: Pearson New International Edition
Book reviews » VHDL for Engineers: Pearson New International Edition
|
|
 |
|
|
|
|
